Short/Character.reverseBytes intrinsics

Tom Rodriguez tom.rodriguez at
Tue Apr 20 10:47:53 PDT 2010

On Apr 20, 2010, at 2:22 AM, Christian Thalinger wrote:

> On Thu, 2010-04-15 at 10:30 -0700, Tom Rodriguez wrote:
>> Can we use the macroassembler loads instead of emit_form on sparc?
> I was thinking the same but then I looked at emit_form3_mem_reg_asi and
> there is some other stuff happening there (SP/FP special case, disp !=
> 0).

The special cases for FP/SP are needed for the stackSlotI variants but the memory variants can use the macroassembler versions if they are changed to be use iRegP instead of memory.  This will force the matcher to compute the address into a register instead of attempting to use addressing modes which aren't supported by the ASI loads.  The stackSlotI variants have to be handled by hand because the offsets aren't known until after register allocation.  I just noticed that the original ReverseBytes routines also use the old ins_encode style, so maybe we should just keep the new ones like the old ones.  The new ones should really be:

  ins_encode( form3_mem_reg_little(src, dst) );

instead of the ins_encode %{ %} style since that is intended for the MacroAssembler style encodings.  The opcodes in the webrev are wrong as well since they are the opcodes for the normal load not the ASI variant.  The effect statements are also redundant and can be dropped.

I think this all leads me to wish that all the reverse routines were written directly in terms of MacroAssembler with memory changed to iRegP and the stackSlotI variants handled by hand but in MacroAssembler as well.  So the loads would look like this:

// Load char reversed byte order
instruct loadC_reversed(iRegI dst, iRegP src) %{
  match(Set dst (ReverseBytesC (LoadUS src)));

  format %{ "LDUHA  $src, $dst\t!asi=primary_little" %}

  ins_encode %{
    __ lduha($src$$Register, Assembler::ASI_PRIMARY_LITTLE, $dst$$Register);

and the stackSlotI variants would look like this:

instruct bytes_reverse_char(iRegI dst, stackSlotI src) %{
  match(Set dst (ReverseBytesC src));
  effect(DEF dst, USE src);

  // Op cost is artificially doubled to make sure that load or store
  // instructions are preferred over this one which requires a spill
  // onto a stack slot.
  format %{ "LDUHA  $src, $dst\t!asi=primary_little\n\t" %}
  ins_encode %{
    int offset = $src$$disp + STACK_BIAS;
    __ add($src$$base$$Register, __ ensure_simm13_or_reg(offset, O7), O7);
    __ lduha(O7, Assembler::ASI_PRIMARY_LITTLE, $dst$$Register);
  ins_pipe( iload_mem );

> -- Christian

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