Review Request: 3DNow Prefetch Instruction Support
vladimir.kozlov at oracle.com
Mon Apr 11 14:24:57 PDT 2011
Looks good. I filed 7035713 and will push this changes.
I had to remove one "%s" in feature srting output format since you removed
"3dnowext". And we usually leave logical operator on first line:
! if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) ||
! (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0))
! result |= CPU_3DNOW_PREFETCH;
Deneau, Tom wrote:
> Hi all,
> Please review this patch which changes the logic for detecting whether or not a processor supports the 3dnow prefetchw and prefetch instructions. A separate CPUID bit (defined in about 2007) allows a processor to support 3dnow prefetch instructions without supporting the whole 3dnow instruction set. The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.
> The webrev is at
> The logic change is really one small change in src/cpu/x86/vm/vm_version_x86.hpp but to clarify things I changed a function name from supports_3dnow() to supports_3dnow_prefetch() which is really what was meant all along. This was the reason the other files changed. I did not make any change in src/cpu/x86/vm/x86_64.ad since that was not checking for 3dnow support.
> I do not have a bug id for this.
> -- Tom Deneau, AMD
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