RFR: 8135018: AARCH64: Missing memory barriers for CMS collector

Dean Long dean.long at oracle.com
Fri Sep 4 17:17:52 UTC 2015

On 9/4/2015 7:37 AM, Andrew Haley wrote:
> On 09/03/2015 06:52 PM, Dean Long wrote:
>> In LIRGenerator::do_StoreIndexed, it looks like the barrier is being
>> done twice, first in store_check, and again in post_barrier. Doing
>> it in post_barrier makes more sense to me than doing it in
>> store_check.
> I guess I don't really see that.  As far as I can see store_check
> doesn't emit any barrier.  I've traced through it to try to understand
> what you mean.
> Andrew.

Sorry, it looks like I confused MacroAssembler::store_check with the C1 


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