[aarch64-port-dev ] RFR(S): 8194256 - AARCH64: SIMD shift instructions are incorrectly encoded
aph at redhat.com
Wed Jan 17 10:08:41 UTC 2018
On 17/01/18 03:21, Ningsheng Jian wrote:
> I agree that your patch looks better than original logic. But I found
> that these instructions are being used in codegen. We need to update
> the codegen part with your new logic.
> Some jtreg vect cases failed with your patch:
> I have created a new bug:
Ouch. This is bad. I guess you don't know which were affected?
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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