Review Request: Regression Zero fails to handle fast_aldc and fast_aldc_w in hs20
xerxes at zafena.se
Wed Apr 20 17:07:01 PDT 2011
On 2011-04-21 00:39, Dr Andrew John Hughes wrote:
> On 16:00 Wed 20 Apr , Xerxes Rånby wrote:
>> hs20 uses two new internal instructions fast_aldc and fast_aldc_w.
>> see: openjdk/hotspot/src/share/vm/interpreter/bytecodes.hpp
>> This webrev fix by backporting Zero fixes from OpenJDK bug 7032458 and 7030207.
>> The webrev are made against hsx20
>> I don't have a bug id for this.
> Why are you merging together two different changesets?
Because they both contain parts that are needed to properly fix this
Zero regression on hs20 and prevent it from happening again.
One part that fixes the regression by making the instruction table in
sync again from 7032458, and another part from 7030207 that reveals the
error if the table gets out of sync again.
If I quote Gary:
"It two new internal instructions, _fast_aldc and _fast_aldc_w, but
it added them *before* _return_register_finalizer, which broke the
instructions table in bytecodeInterpreter.cpp. It meant that when
the C++ interpreter saw _return_register_finalizer it would execute
opc_default, which should have thrown an error but for the piece of
the ARM interpreter which hid the error by rewriting the instruction
to a plain _return. I didn't see it before because I was doing
debug builds, and the C++ interpreter only uses the instructions
table for product builds."
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