Release store in C2 putfield

Doug Lea dl at
Fri Sep 5 15:37:50 UTC 2014

On 09/05/2014 10:41 AM, Andrew Haley wrote:
> On 09/05/2014 03:35 PM, Doug Lea wrote:
>> ARMv8 (also IA64) acquire/release specs bind some effects
>> to the locations. If you treat the release and store
>> as separable, and later combine at instruction generation, it's
>> superficially conceivable that you'd lose something in case you
>> matched different writes with different fences. (Plus, if you
>> cannot combine, you'd choose a plain fence or use fake thread-local
>> target for releasing write; although we've seen (for x86) that
>> choosing fake targets can be challenging...)
> I think I may give up even trying to combine fences with writes, and
> emit explicit barrier instructions.  That way I at least don't lose
> relative to other targets.

I probably don't deserve an opinion about this since I don't
deal much with hotspot internals, but this seems to be the
wrong stance: There are a bunch of cases across a bunch of
processors in which fences and accesses are profitably fusible,
but no standard way to do it. Even on x64 (probably not 32bit x86),
you'd like the option of fusing write+volatile as XCHG, but doing
so looks like it would require something in .ad files similar to
your aarch64 predicate(followed_by_ordered_store(n)) trick.
It would be nice to come up with some way to express these
in a way that hotspot could deal with them before outputing
instructions. (BTW, I know of the aarch64 strategy because I
looked to see how you did this when (almost) proposing it be
done in preference to the x86 xadd membar encoding.)


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