RFR: 7143664: Clean up OrderAccess implementations and usage

David Holmes david.holmes at oracle.com
Tue Feb 10 01:37:45 UTC 2015

On 10/02/2015 5:22 AM, Dean Long wrote:
> On 2/8/2015 11:14 PM, David Holmes wrote:
>> src/os_cpu/bsd_x86/vm/orderAccess_bsd_x86.inline.hpp
>> src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp
>> In OrderAccess::fence doesn't the existing asm already act as a
>> compiler barrier; and on uniprocessor we need neither compiler nor
>> hardware barriers; so isn't the compiler_barrier() redundant?
> Wouldn't a uniprocessor need compiler barriers just in case it got a
> context switch in the middle of compiler-reordered instructions?

Yes of course you are right.


> dl

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