[aarch64-port-dev ] RFR: 8129426: aarch64: add support for PopCount in C2

Andrew Dinn adinn at redhat.com
Mon Jun 22 15:29:22 UTC 2015

On 22/06/15 16:04, Andrew Haley wrote:
> On 06/22/2015 03:59 PM, Edward Nevill wrote:
>> On Mon, 2015-06-22 at 15:04 +0100, Andrew Haley wrote:
>>> On 06/22/2015 02:23 PM, Edward Nevill wrote:
>>>> Aarch64 currently does not support the PopCountI and PopCountL nodes in aarch64.ad
>>>> Please review and if OK I will push,
>>> Shouldn't mov in the IregI case be movw?  And iRegI be iRegIorL2I?
>> No. It needs 0s in the top 32 bits.
>> The reason is that the following CNT instruction is only available in 8B or 16B forms.
>> It was iRegIorL2I before, I changed it to IregI because of this problem.
> Well, you're asking for trouble.  We've tried to make sure that the
> top half of an int register is always zero, but it's hard absolutely
> to guarantee it in all cases.  Does movw to a vector register really
> not clear the top 32 bits of the dest?

Aargh, after checking the Manuel (as a last resort) it appears that the
32 bit move carefully moves a 32 bit word into a 32 bit slot leaving the
rest of the slots unchanged -- MOV is documented as an alias for INS
which pretty much explains the semantics.

It seems that the scalar fmovw instruction does the same (it is
documented as overlapping the behaviour of the vector move instruction).

So, it seems Ed is right to use iRegI and rely on an l2i conversion to
zero the top word if the incoming value is long.


Andrew Dinn

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