RFR: 8199138: Add RISC-V support to Zero
erik.helin at oracle.com
Wed Mar 21 13:21:11 UTC 2018
On 03/20/2018 02:54 PM, Edward Nevill wrote:
> On Tue, 2018-03-20 at 08:39 +0100, Erik Helin wrote:
>> Please review the following webrev
>>> Bugid: https://bugs.openjdk.java.net/browse/JDK-8199138
>>> Webrev: http://cr.openjdk.java.net/~enevill/8199138/webrev.00
>> 32 # First, filter out everything that doesn't begin with "aarch64-"
>> 33 if ! echo $* | grep '^aarch64-\|^riscv64-' >/dev/null ; then
>> Could you please update the comment on line 32 to say the same thing as
>> the code?
> Hi Eirk,
> Thanks for this. I have updated the webrev with the above comment.
Please also update the error message at line 1802 - 1804:
1802 #error Method os::dll_load requires that one of following is
1803 AARCH64, ALPHA, ARM, AMD64, IA32, IA64, M68K, MIPS, MIPSEL,
PARISC, __powerpc__, __powerpc64__, S390, SH, __sparc
> I have also fixed a problem encountered with the submit-hs repo where the build machine had older headers which did not define EM_RISCV.
> The solution is to define EM_RISCV if not already defined as is done for aarch64.
> #ifndef EM_AARCH64
> #define EM_AARCH64 183 /* ARM AARCH64 */
> +#ifndef EM_RISCV
> + #define EM_RISCV 243
Maybe add a corresponding /* RISC-V */ comment to use the same style as
the other defines?
> This now passes the submit-hs tests.
> Does this look OK to push now?
Please send out a final webrev first.
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