[lworld] Integrated: 8272566: [lworld] [AArch64] G1 write barrier slow path needs to save more registers

Nick Gasson ngasson at openjdk.java.net
Wed Aug 18 15:28:48 UTC 2021


On Wed, 18 Aug 2021 06:39:34 GMT, Nick Gasson <ngasson at openjdk.org> wrote:

> We call MacroAssembler::store_heap_oop() when packing inline type
> arguments in C1's scalarised entry point and that in turn uses the
> interpreter's barrier set assembler for the write barrier.  With G1GC
> this can call into the runtime on the slow path, but it doesn't preserve
> the call-clobbered registers, which include the Java argument registers.
> 
> This was fixed on x86 in JDK-8242210 and JDK-8251398 but I missed that
> when I updated the AArch64 port earlier in the year.  I haven't actually
> seen any failures caused by this, but from looking at the generated
> assembly it's certainly possible.
> 
> This patch saves only the argument registers, and only if Valhalla is
> enabled (unlike x86 which saves all registers unconditionally).  There
> are 32 caller-saved registers on AArch64 so I wanted to avoid generating
> many additional store/load instructions.

This pull request has now been integrated.

Changeset: b0219dc8
Author:    Nick Gasson <ngasson at openjdk.org>
Committer: Tobias Hartmann <thartmann at openjdk.org>
URL:       https://git.openjdk.java.net/valhalla/commit/b0219dc830456e44c1dece77c98661a72e80e8d9
Stats:     44 lines in 2 files changed: 35 ins; 0 del; 9 mod

8272566: [lworld] [AArch64] G1 write barrier slow path needs to save more registers

Reviewed-by: thartmann

-------------

PR: https://git.openjdk.java.net/valhalla/pull/534


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