x86 registers passed to other ISA target assemblers

Thomas Wuerthinger thomas.wuerthinger at oracle.com
Thu Mar 14 06:18:05 PDT 2013


At the moment the register configuration is retrieved from the runtime in "Backend.newFrameMap". You could override this method in PTXBackend to pass in a different register configuration. We are currently in the process of restructuring the backend to fit the needs of PTX. I'll keep you updated - you can expect a new version by the end of next week.

The runtime is a singleton and represents the "host runtime" - i.e., it corresponds to the platform HotSpot itself is compiled with. This means you can still produce PTX code with PTX registers while the host runtime is AMD64.

- thomas

On Mar 14, 2013, at 2:07 AM, "Venkatachalam, Vasanth" <Vasanth.Venkatachalam at amd.com> wrote:

> Hi,
> I noticed that when running BasicPTXTest.java, the PTX assembler is getting passed AMD64 Registers. This became apparent when I hacked the assembler routines to print the names of the Register parameters passed.
> After single stepping through the code to understand how AMD64 registers are coming into the picture, I found a routine AMD64HotspotGraalRuntime.makeInstance(), which is instantiating a new
> new AMD64HotspotGraalRuntime(). It looks like this routine is getting called by graalVMToCompiler.cpp in the below lines:
> Handle VMToCompiler::graalRuntime() {
>  if (JNIHandles::resolve(_graalRuntimePermObject) == NULL) {
> #ifdef AMD64
>    Symbol* name = vmSymbols::com_oracle_graal_hotspot_amd64_AMD64HotSpotGraalRuntime();
> #endif
>    KlassHandle klass = loadClass(name);
>    JavaValue result(T_OBJECT);
>    JavaCalls::call_static(&result, klass, vmSymbols::makeInstance_name(), vmSymbols::getInstance_signature(), Thread::current());
>> From the above code, it looks like the VM is defaulting  to use the AMD64 runtime in cases where you are running on an AMD64 platform, even if we are running a test case for one of the other ISAs (BasicPTXTest) that simply prints out the code that is generated (without executing the code).
> Am I correct in thinking this is why AMD64 registers are getting passed into the PTX Assembler?
> Vasanth

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