ConditionProfile vs. BranchProfile

Raffaello Giulietti raffaello.giulietti at
Tue Jul 5 14:55:35 UTC 2016

Thanks Chris and Christian, your explanations make sense.


On 2016-07-05 13:19, Christian Humer wrote:
> I'd like to add that branch probabilities are useful for some Graal
> optimizations like Partial Escape Analysis, where allocations are pushed
> into infrequent pathes.
> This is something Graal can only do if you inject branch probabilities
> using a counting condition profile.
> Cheers,
> Christian Humer
> On 05.07.2016 15:12:59, "Chris Seaton" <chris.seaton at> wrote:
>> If you were to write
>> a = new BranchProfile();
>> b = new BranchProfile();
>> if (c) {
>>     a.enter();
>>>> } else {
>>     b.enter();
>>>> }
>> Then that’s almost the same thing as a ConditionProfile. So that’s
>> useful on its own - it’s less code and less data than using two
>> BranchProfiles.
>> As you say, ConditionProfile also introduces the branch counts and
>> reorders the branches based on which is more likely. This works with
>> the hardware branch predictor, because in most processors forward
>> jumps are predicted not taken (or the other way around, I can’t
>> remember but it’s in the Intel manual).
>> You ask if the hardware would predict this correctly anyway. Well the
>> prediction cache is of course of limited size so it could run out. I
>> would admit you may struggle to empirically prove that reordering
>> branches like this makes a big difference on benchmarks. Maybe give it
>> a go if you’re curious enough and tell us about the results?
>> Chris
>>>  On 5 Jul 2016, at 13:58, Raffaello Giulietti
>>> <raffaello.giulietti at> wrote:
>>>  Hello,
>>>  while I think I understand the usefulness of Truffle's BranchProfile, I
>>>  don't get what the point is with ConditionProfile.
>>>  I mean, except when the condition profile indicates a zero count on
>>>  either the "then" or "else" parts, what is the real value of having
>>> such
>>>  a profile? The only reason I can figure out is something related to
>>> code
>>>  layout. I thought, however, that such optimizations were already
>>>  addressed by the hardware branch prediction mechanics. Granted, the
>>>  latter needs not necessarily be implemented on every CPU out there.
>>>  Any explanation is appreciated and welcome.
>>>  Greetings
>>>  Raffaello

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