Sub-word comparisons

Doug Simon doug.simon at
Thu Nov 3 19:18:36 UTC 2016

The lowering of a CompareNode to a CompareOp is AArch64 specific as far as I can see. This originates from the AArch64 implementations of LIRGenerator.emitCompareBranch and LIRGenerator.emitConditionalMove. You’ll have to change those methods to generate LIR ops that AArch64 actually supports.


> On 3 Nov 2016, at 18:01, Andrew Haley <aph at> wrote:
> I've got a tricky bug that I can't figure out how to fix.
> I'm seeing comparisons of mixed types, and I can't figure out how to
> generate decent code for them.
> For example, I see a
>  CompareNode(x: i8, y: i8)
> which gets lowered to
>  Compare(PlatformKind = BYTE, left: v59|DWORD, right: byte[0|0x0])
> so I guess I'm supposed only to be comparing the bottom 8 bits of the
> register.  But I can't do that: I can only compare 32- or 64-bit
> quantities.  It would be possible but extremely ugly to do it by
> shifting both quantities left and then doing the comparison.
> It would be extremely nice if I could tell Graal that I can't do
> subword arithmetic of any kind.  Is anything like that possible?
> Andrew.

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