RFR :7088419 : (L) Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32 and java.util.zip.Adler32
david.r.chase at oracle.com
Thu May 16 15:23:36 PDT 2013
On 2013-05-16, at 6:16 PM, Mike Duigou <mike.duigou at oracle.com> wrote:
>> Note that the instruction also works on 32-bit, and once the builds all use sufficiently modern compilers, the same source code works for both.
> Understood, but it's only going to be available on processors that support also support EMT64, correct? I am not sure what the best way to characterize the required architecture should be.
According to the Intel docs, it has to provide CLMUL and AVX features, so that's what the code looks for. CLMUL gets you CLMUL, AVX adds the three-operand form that gets you the better code and keeps the guy writing the code from going even more nuts than he already did, because there is no way I want to have 4 versions of that assembly language, never mind that there's not too many chips in the CLMUL-minus-AVX category anyway.
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