AARCH64: 8139041: Redundant DMB instructions (CORRECTED )

Vladimir Kozlov vladimir.kozlov at oracle.com
Wed Oct 14 01:59:11 UTC 2015

Looks good. I leave to Roland to push through JPRT since it has shared part.


On 10/14/15 12:38 AM, Andrew Haley wrote:
> On 10/10/2015 02:00 AM, Vladimir Kozlov wrote:
>> On 10/10/15 2:47 AM, Christian Thalinger wrote:
>>>> On Oct 9, 2015, at 5:37 AM, Andrew Haley <aph at redhat.com> wrote:
>>>> Hi,
>>>> On 10/09/2015 03:59 PM, Roland Westrelin wrote:
>>>>>> There is a much simpler way: remove adjacent barriers in
>>>>>> MacroAssembler.  Thanks to the way that the AArch64 ISA is designed,
>>>>>> barriers can be merged simply by ORing them together.  Of course, this
>>>>>> technique works for C1 and C2, and it adds essentially nothing to the
>>>>>> compilation time.
>>>>>> http://cr.openjdk.java.net/~aph/8139041/
>>>>>> One thing which may be controversial is that I've added a field to
>>>>>> CodeBuffer to keep track of barriers and labels.  I had to do this
>>>>>> because when we're compiling there is (AFAICS) essentially nowhere
>>>>>> else to keep the state.
>>> I don’t think it matters to have an additional field in CodeBuffer.  It’s a temporary data structure and we use much more memory for graphs.
>>> I would even go that far and questioning putting it under #ifdef AARCH64.
>> +1 that.
> OK.  I'm guessing that PPC will want to use this anyway.
> http://cr.openjdk.java.net/~aph/8139041-2
> Andrew.

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