RFR(M) 8151003 remove nds validity checks from vex x86 assembler
Berg, Michael C
michael.c.berg at intel.com
Mon Apr 4 23:30:04 UTC 2016
Before we were aliasing, which lent some ambiguity regarding AVX2 and EVEX usage, as the aliased forms had more programming via the imm field. This way they are fully separate.
From: Vladimir Kozlov [mailto:vladimir.kozlov at oracle.com]
Sent: Monday, April 04, 2016 4:25 PM
To: Berg, Michael C <michael.c.berg at intel.com>; 'hotspot-compiler-dev at openjdk.java.net' <hotspot-compiler-dev at openjdk.java.net>
Subject: Re: RFR(M) 8151003 remove nds validity checks from vex x86 assembler
Bug number in links is incorrect. Should be:
Changes looks good. Very nice clean up. I will start testing.
I see you changed code for AVX > 2 in macroAssembler_x86.hpp. Is it because new instructions faster or to avoid mixing evex and non-evex instructions?
On 4/1/16 2:51 PM, Berg, Michael C wrote:
> Hi All,
> I would like to contribute some clean up on the x86 assembler applied
> to vex encoding to address the usage of the nds assembler parameter.
> For all instructions which use nds source xmm registers, the validity
> check has been removed. It was originally placed there here:
> And propagated. Now nds register usage is fully compliant with each
> isa descrption.
> Bug-id: https://bugs.openjdk.java.net/browse/JDK-8151001
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