CR for RFR 8154896

Berg, Michael C michael.c.berg at
Tue Apr 26 18:15:58 UTC 2016

No, the actual bug fix is in the jccb to jcc changes.
The assembler change is a correction for compressed displacement.


From: Christian Thalinger [mailto:christian.thalinger at]
Sent: Tuesday, April 26, 2016 10:11 AM
To: Berg, Michael C <michael.c.berg at>
Cc: hotspot-compiler-dev at
Subject: Re: CR for RFR 8154896

On Apr 23, 2016, at 4:14 PM, Berg, Michael C <michael.c.berg at<mailto:michael.c.berg at>> wrote:

Hi Folks,

I would like to contribute a bug fix for SKX/EVEX code gen.

The bug fix is the change in src/cpu/x86/vm/assembler_x86.cpp, correct?

  There is a guarantee of isBit(imm8) for jccb which can sometimes fail when upper bank register marshaling is required for instructions without EVEX or conditionally EVEX support on SKX.  This patch address the minimal set of changes which can have this issue.

This code was tested as follows (see jbs entry below):




-------------- next part --------------
An HTML attachment was scrubbed...
URL: <>

More information about the hotspot-compiler-dev mailing list