RFR(XS): 8165256: ARM64: vm/gc/concurrent/lp30yp10rp30mr0st300 Crash SIGBUS
rickard.backman at oracle.com
Thu Feb 16 07:56:09 UTC 2017
Thank you Andrew.
I wasn't entirely sure about that. I'll remove the storestore.
On 02/15, Andrew Haley wrote:
> On 15/02/17 13:06, Rickard Bäckman wrote:
> > Adding both instruction cache invalidation of the interpreter stub when
> > values are updated and a barrier between the stores of data/jump and the
> > call.
> I don't think the storestore fence does anything. ICache::invalidate_range
> should flush both caches to the point of unification.
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