RFR (S): 8184162: Support addresses with index operands in LIRAssembler::leal on SPARC
erik.osterlund at oracle.com
Tue Jul 11 16:41:58 UTC 2017
Thank you for reviewing.
I do not believe it would be safe to use the dest_reg instead of G3_scratch. I believe that in the same way that the destination and base register are allowed to be the same, the index register and destination register may be the same register. Therefore, it seemed strictly safer to use G3_scratch instead for temporary state whenever the result can not be computed with a single instruction, and install the final value into dest_reg only with the very last instruction.
Otherwise if the index register and destination are the same, you would clobber the index in the first add instruction that adds disp with the base register, and end up in an awkward situation for obvious reasons.
G3_scratch is guaranteed to be available in this context, and yields the same instruction sequence, just different registers. So that seemed encouraging.
Sent from my iPhone
> On 11 Jul 2017, at 18:16, Vladimir Kozlov <vladimir.kozlov at oracle.com> wrote:
> You can use dest_reg instead of G3 in this code I think. It can be used to store any values before storing final result.
> Would be nice if Roland, who added this code, can comment on it.
>> On 7/11/17 4:27 AM, Erik Österlund wrote:
>> The LIRAssembler::leal member function on SPARC complains about loading the effecting addresses where the address has an index operand, with the following assert stating it is not yet supported:
>> assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1, "can't handle complex addresses yet");
>> Support for index operands in the address is required for some upcoming changes, therefore it would be nice if this was supported.
>> So here is a webrev that starts supporting index operands for leal on SPARC.
>> Testing: JPRT -testset hotspot, and manual code inspection on a T7-4 SPARC machine
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