[aarch64-port-dev ] RFR: 8195588: AArch64: Codegen fix after JDK-8194256

Ningsheng Jian ningsheng.jian at linaro.org
Thu Jan 18 01:27:55 UTC 2018

Hi Andrew,

Sorry for missing detailed description, and thanks to Dmitrij's explanation!

Basically, without Dmitrij's patch, old assembler worked fine with
original codegen, but the shift constant parameters are not the
"direct" values for those instructions. Users (e.g. codegen) need to
modify the human readable shift values in specific way to get correct
encoding. Without reading the assembler implementation, no one knows
the magic - the original codegen does encode the plain shift value
first to feed assembler the required imm encoding. So Dmitrij updated
the assembly implementation to make the shift values align with common
understanding (also align with GNU assembler). This patch adds the
missing codegen part modification to align with Dmitrij's new assembly
interfaces - just pass the direct simple shift constants to those

I will also update the bug description in JBS.


On 17 January 2018 at 21:36, Dmitrij Pochepko
<dmitrij.pochepko at bell-sw.com> wrote:
> On 17.01.2018 13:14, Andrew Haley wrote:
>> On 17/01/18 10:01, Ningsheng Jian wrote:
>>> Please help to review this fix.
>> There's insufficient explanation for anyone to review this patch.
>> What exactly has been done, and why?
> Hi,
> "shl", "ushr" and "sshr" instructions had incorrect encoding and thus all
> these instructions usages were using workaround(as part of
> http://hg.openjdk.java.net/jdk10/hs/rev/97b3293d261) to produce correct
> encoding. Shift values were modified in specific way before passing it to
> "shl", "ushr" and "sshr". It's not clear to me why this workaround was added
> instead of fixing instruction encoding. Now that instruction encoding was
> fixed by me, this workaround is no longer needed. So, Ningsheng removed this
> workaround code and codegen code became shorter and simplier, without any
> "strange-at-first-sight" constant manipulations(all these manipulations are
> now in instruction encoding logic).
> Thanks,
> Dmitrij

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