RFR(S) 8200067: Vector Carry-less Multiplication support
vladimir.kozlov at oracle.com
Fri Mar 23 21:46:58 UTC 2018
Why you placed xmm0 initialization before size check?:
+ movdqu(xmm0, ExternalAddress(StubRoutines::x86::crc_by128_masks_addr() + 32));
I think initialization and the check should be inside code guarded by supports_vpclmulqdq().
L_Parallel is not used - no jump to it.
On 3/22/18 12:11 PM, Rukmannagari, Shravya wrote:
> Hi everyone,
> As per “Intel Architecture Instruction Set Extensions and Future Features Programming Reference”
> manual , vector carry-less multiplication (vpclmulqdq) instruction will be supported in future
> Intel ISA. I have updated the CRC32 algorithm to take advantage of this instruction. I have tested
> with Intel SDE  to confirm encoding and semantics are correctly implemented. Please take a look
> and let me know if you have any questions or comments.
>  https://software.intel.com/en-us/articles/intel-software-development-emulator
>  https://bugs.openjdk.java.net/browse/JDK-8200067
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