[aarch64-port-dev ] RFR: JDK-8214527 AArch64: ZGC for Aarch64
aph at redhat.com
Thu Jun 13 12:59:46 UTC 2019
On 6/13/19 1:56 PM, Andrew Dinn wrote:
> On 13/06/2019 13:24, Stuart Monteith wrote:
>> Yes, let's leave the renaming until JDK14 - I was aiming for the patch
>> to make JDK13, but we'll see.
>> The registers are being defined here in order for the LoadBarrier for
>> ZGC in z_aarch64.ad to spill them while it does the barrier
>> correction. I had thought the vector registers would need to have
>> their full 128 bits spilled, if they happened to be live - this is the
>> same as what is done for z_x86_64.ad .
> Well, as far as I understand it: if the registers happened to be live
> with 128 bit data loaded by C2 generated code then they should get
> spilled as 128 bits values when an instruction is generated that KILLs
> the bottom 64 bits.
> Of course, there is also the question of what C2 ought to do to preserve
> incoming values in callee-save float registers. I am not sure of this
> but I thought callers could only expect 64 bit float register data to be
> saved by the callee. Is that right? Or did I make that last bit up?
There are no callee-save float registers in the Java calling convention.
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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