RFR: 8232782: Shenandoah: streamline post-LRB CAS barrier (aarch64)

Andrew Haley aph at redhat.com
Wed Jun 24 15:22:40 UTC 2020

On 24/06/2020 15:29, Andrew Haley wrote:
> On 24/06/2020 14:54, Nilsen, Kelvin wrote:
>> Is this ok to merge?
> One thing:
> Some CPUs, in particular those based on Neoverse N1, can perform very
> badly when using ldxr/stxr. For that reason, all code doing CAS
> I can't see any reason why your code needs to use ldxr/stxr. Is there
> any?

I should have said, but didn't: please use MacroAssembler::cmpxchg()

Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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