RFR (M): 8029396: PPC64 (part 212): Several memory ordering fixes in C-code.
coleen.phillimore at oracle.com
Tue Dec 3 10:15:05 PST 2013
I did look at this yesterday. It looks fine. I was trying to find if
there were others that might have been missed. How did you find this
set in this changeset? Did you look for volatile and find instances
that didn't use CAS or other memory ordering instructions? We've done
this exercise before but it's easy to miss things.
On 12/03/2013 12:09 PM, Lindenmaier, Goetz wrote:
> could somebody of rt and gc please have a look at the following change?
> It contains memory ordering fixes as required by the PPC64 port, see also
> Thanks and best regards,
> -----Original Message-----
> From: Vladimir Kozlov [mailto:vladimir.kozlov at oracle.com]
> Sent: Montag, 2. Dezember 2013 22:42
> To: Lindenmaier, Goetz; 'hotspot-dev at openjdk.java.net'; 'ppc-aix-port-dev at openjdk.java.net'
> Subject: Re: RFR (M): 8029396: PPC64 (part 212): Several memory ordering fixes in C-code.
> These changes need to be reviewed by GC and Runtime group. Especially
> first 2 changes (CMS).
> The rest 6 changes are less performance critical and, I think they are
> On 12/2/13 8:51 AM, Lindenmaier, Goetz wrote:
>> This change contains a row of fixes to the memory ordering in runtime, GC etc.
>> These are:
>> - Accessing arrays in CMS (compactibleFreeListSpace.cpp)
>> - CMS: Do release when marking a card dirty. The release must only be done if GC is running. (several files)
>> - Method counter initialization (method.hpp).
>> - Order accessing f1/f2 in constant pool cache.
>> - Release stores in OopMapCache constructor (instanceKLass.cpp).
>> - BiasedLocking: Release setting object header to displaced mark.
>> - Release state of nmethod sweeper (sweeper.cpp).
>> - Do barriers when writing the thread state (thread.hpp).
>> Please review and test this change.
>> If requested, I can part this into smaller changes. But for now
>> I wanted to put them all into one change as they all address the
>> problems with the PPC memory model.
>> Best regards,
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